Study on the Effect of Polishing Pad Layer Structure on Dishing Control in Chemical Mechanical Planarization of Through-Silicon via Copper Patterned Wafer
Quoc-Phong Pham1✉Emailphongpham@tvu.edu.vn
Le Nam Quoc Huy2Emailnale@clarkson.edu
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College of Engineering and TechnologyTra Vinh University2Clarkson University
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Abstract
In advanced semiconductor manufacturing, copper interconnects fabricated via the dual damascene process rely heavily on chemical mechanical planarization (CMP) to achieve global planarity and defect-free surfaces. However, achieving optimal material removal uniformity, minimal dishing in recessed features, and low surface roughness remains challenging for through-silicon via copper structure on patterned wafers. Addressing these issues, this study developed a novel in-situ downforce simulation apparatus combined with the quadrat method for asperity spatial analysis to elucidate the role of polishing pad layer architecture in CMP performance. Multi-scale nano-indentation and real-time contact imaging were employed to compare the monolithic IC1000 polishing pad with the bilayer ICSU polishing pad. Results revealed that the ICSU polishing pad, owing to its compliant Suba™ IV sub-layer, exhibits greater asperity deformability, higher real contact area ratio, and more uniform asperity distribution under various downforce. Consequently, the ICSU polishing pad delivered superior CMP surface roughness and within-wafer uniformity, whereas the stiffer IC1000 polishing pad provided better dishing control in patterned features. These findings highlight fundamental trade-offs in polishing pad design and offer practical guidance for polishing pad selection in high-density copper interconnect CMP process, with potential to enhance yield and reliability in next-generation devices.
Keywords
Polishing pad architecture
Dishing control
Asperity contact behavior
Chemical mechanical planarization (CMP)
Patterned wafer
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Introduction
Semiconductor technology continues to scale toward the 3 nm node to achieve higher integration density, improved device performance, and reduced power consumption. At this technology level, fabrication processes must simultaneously ensure accurate pattern definition and excellent global and local surface planarity \cite{bib1, bib2, bib3, bib4}. While aluminum interconnects formed by reactive ion etching were widely used in conventional integrated circuit manufacturing, continued device scaling has rendered this approach inadequate in meeting the electrical and thermal requirements of advanced nodes. As a result, copper interconnects deposited on silicon wafers have progressively replaced aluminum-based structures, establishing chemical mechanical planarization (CMP) as a critical enabling process for copper interconnect fabrication. Compared with aluminum processes, copper CMP process offers superior electrical conductivity, enhanced thermal dissipation, and improved control of surface topography. Consequently, systematic investigation and optimization of copper CMP processes are essential to satisfy the stringent demands of advanced semiconductor technologies \cite{bib5, bib6, bib7, bib8}. In CMP of patterned copper wafers, dishing refers to the recession of copper features relative to the surrounding dielectric. Excessive dishing leads to copper thickness loss, increased interconnect resistance, and signal propagation delay, thereby degrading device performance and reducing yield in multilevel interconnect fabrication. Moreover, dishing becomes increasingly severe with larger trench or line widths due to preferential mechanical abrasion of the relatively softer copper by polishing pad asperities bib9, bib10, bib11. Therefore, precise control of dishing is particularly critical for through-silicon via copper structures, where accurate copper thickness regulation is required to ensure low-resistance vertical interconnections and reliable three-dimensional integration. Achieving effective dishing control necessitates a nanoscale understanding of material removal behavior during CMP of thin copper films. Accordingly, numerous studies have attempted to predict the material removal rate based on the real contact area between the wafer surface and the polishing pad asperity layer. Models proposed by Huy et al. bib12, Zhou et al. bib13, and Luo et al. bib14, which incorporate the concentration of abrasive particles in the slurry interacting with the copper thin film, have provided valuable insights into copper removal mechanisms. However, these models are primarily developed and validated using blanket wafers and therefore fail to capture pattern-dependent contact mechanics and localized pad abrasive feature interactions that dominate material removal in advanced interconnect structures. When transitioning from blanket to patterned wafers, significant variations in material removal selectivity, dishing, and erosion arise due to pattern density effects and local feature topography, substantially limiting the applicability of existing blanket wafer based models to realistic CMP processes for patterned copper wafers bib15, bib16, bib17. In addition, most prior studies have focused on single-layer polishing pads, largely neglecting the influence of bilayer or multilayer pad architectures on mechanical response, asperity deformability, and contact uniformity. Although some studies have compared the polishing performance of single-layer and bilayer pads on blanket wafers by Lu et al bib18 and Prasad et al bib19, a systematic methodology to elucidate how pad structural architecture governs CMP behavior in patterned copper wafers remains lacking. Recent investigations into soft pad effects in copper CMP, including studies by Huy et al. bib20, have employed micro-computed tomography (micro-CT) scanning technology and finite element simulations to reconstruct pad structures and evaluate asperity topology under applied downforce. Nevertheless, these analyses were limited to simplified pad designs and did not quantify asperity spatial distribution at the wafer pad interface, nor did they consider the mechanical response of multilayer pad architectures. Overall, while asperity-based modeling frameworks have highlighted the influence of pad surface features on planarization efficiency, the combined effects of pad structural compliance and pattern-induced non-uniform contact behavior in CMP of patterned copper wafers remain insufficiently understood. To address these limitations, this study proposes, for the first time, an integrated experimental and analytical framework to clarify how polishing pad structure influences the asperity layer and, consequently, the real contact area between the polishing pad and the wafer. A novel in situ downforce simulation apparatus is developed and combined with a quadrat distribution analysis method, which is applied for the first time to characterize asperity spatial distribution under CMP-relevant loading conditions. Furthermore, multiscale nano-indentation is employed to compare the mechanical properties of a monolithic IC1000 pad and a bilayer ICSU pad, elucidating the effects of pad architecture on asperity deformability, real contact area ratio, and contact uniformity. CMP experiments on patterned copper wafers are conducted to evaluate surface roughness, dishing, and planarization uniformity, thereby providing practical insights for polishing pad optimization in high-density copper interconnect fabrication.\\
Investigating polishing pad characteristics
Sample preparation
In order to examine the influence of polishing pad layer structure on the CMP performance of copper patterned wafers, two commercially available polishing pads from Kuraray Co., Ltd. (Japan) were utilized in this study: the standard IC1000 polishing pad and the ICSU polishing pad. Cross-sectional scanning electron microscopy (SEM) images of both pads are presented in Figure 1, highlighting their markedly different architecture characteristics. As shown in Figure 1(a), the IC1000 pad consists of a monolithic thermoplastic polyurethane (TPU) matrix containing closed-cell micropores with diameters ranging from approximately 3 µm to 80 µm. This porous structure confers the high stiffness and superior local planarization efficiency typical of hard pads. In contrast, the ICSU polishing pad, depicted in Figure 1(b), features a bilayer composite architecture in which a top IC1000 polishing layer is permanently bonded to a softer, non-woven Suba™ IV sub-pad. \\
Fig. 1
Cross-sectional SEM images of (a) the monolithic IC1000 polishing pad and (b) the bilayer ICSU polishing pad, consisting of an IC1000 top layer permanently bonded to a Suba ™ IV sub-pad
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As part of the sample preparation to investigate polishing pad properties, two polishing pads underwent a standardized break-in process. This procedure is essential in CMP to remove the thin skin layer formed during pad manufacturing, expose fresh asperities, stabilize the surface topography, and ensure reproducible material removal rates in subsequent experiments. To achieve optimal and non-damaging conditioning, each polishing pad was securely attached to the platen of a commercial polishing machine (POLI-400L, GnP Technology Inc., Busan, South Korea). In parallel, a diamond lapping film (Imperial Lapping Film, 3M Co., USA) with diamond grits size of 20 µm was mounted on the conditioner disc. This relatively fine grit size was intentionally chosen to prevent excessive mechanical damage or deep grooving of the polishing pad surface. During the break in process, the platen and the conditioner disc were rotated in the same clockwise direction to minimize tearing or gouging of the polishing pads, which is commonly observed under counter rotation. Deionized (DI) water was continuously supplied as a coolant throughout the break in conditioning process to remove polymer debris generated by the diamond grits, suppress localized thermal damage to the pad surface, and maintain a stable and low polishing pad temperature. The break in process parameters are summarized in Table 1.\\A
begin{table}[h!] \centering\caption{Break-in process parameters}\label{tab1} \begin{tabular}{ c c } \hline \begin{minipage}{0.3\textwidth} \includegraphics[width=\linewidth, height=30mm]{Fig_Table1.jpg}\\Diamond lapping film surface \end{minipage} \begin{tabular}{c c}Description & Parameters \\\midrulePolisher & GnP POLI-400L \\Coolant & DI water\\Conditioner & Imperial lapping film\\Break-in condition & \\Platen/conditioner rotation speed & 20/16 RPM \\Break-in time & 20 min \\Conditioner down force & 100 Newton \\ \end{tabular}\\ \hline \end{tabular} \end{table}Analysis the polishing pad properties
The surface morphology and mechanical properties of polishing pads play a critical role in governing the nanoscale characteristics of wafers during the CMP process. Accordingly, advanced characterization techniques, including confocal laser scanning microscopy and nano-indentation, were employed in this study to systematically examine the surface topography, hardness, and elastic modulus of two commercial polishing pads, IC1000 and ICSU, both before and after the break in conditioning process. Specifically, three-dimensional (3-D) surface topography measurements were carried out on both polishing pads using a white light coherence correlation interferometer, Talysurf CCI 6000 (AMETEK Taylor Hobson Ltd., Leicester, England), equipped with a 20 × objective lens. To ensure statistical reliability, nine evenly distributed locations across each pad surface were scanned, with each measurement covering an area of 640 × 640
. In accordance with ISO 25178, the three dimensional surface texture parameters reported in this study include the arithmetical mean height
and the root mean square height
. As shown in Figure 2, the as received IC1000 and ICSU polishing pads exhibited nearly identical surface topography and roughness parameters. Quantitatively, the average Sa value was approximately 10.3 µm, while the average
value was approximately 14.26 µm for both pads, with no statistically significant differences observed between the two polishing pad types. This close agreement can be attributed to the bilayer composite architecture of the ICSU polishing pad, in which a top polishing layer composed of standard IC1000 polishing pad material is permanently bonded to a compliant non-woven Suba™ IV sub polishing pad. Consequently, the effective polishing interface of the ICSU polishing pad is identical in composition and initial microstructural characteristics to that of the monolithic IC1000 polishing pad. Following the break-in conditioning process, both polishing pads exhibited highly comparable surface evolution, as shown in Figure 2. Specifically, the Sa value decreased to 6.6 µm for IC1000 and 6.45 µm for ICSU, while the Sq value was reduced to 9.56 µm for IC1000 and 9.35 µm for ICSU. These changes correspond to an approximate 30 to 35 percent reduction in peak-to-valley height. More importantly, the surface topography of both pads became significantly more uniform, characterized by flattened asperities and substantially reduced pore depth. Notably, the differences in Sa and Sq values between the IC1000 and ICSU polishing pads remained below 1 percent, confirming that the break in conditioning process modifies the polishing surfaces of both pads in an essentially identical manner, despite their distinct sub-pad constructions. In the as received condition, both pads exhibited a characteristic surface morphology consisting of extensive flat plateau regions interspersed with deep pores. Although this morphology provides a consistent initial microstructure, it limits effective abrasive particle retention and leads to inefficient slurry utilization during the early stages of CMP process. After break-in, the newly developed uniform micro texture markedly enhances the pads’ ability to retain and distribute abrasive particles across the polishing interface. At the same time, the reduction in pore depth facilitates improved debris transport and mitigates residue accumulation. As a result, defect formation, including scratches, pits, and contamination on the wafer surface, is effectively minimized. Consequently, the break in process consistently transforms both IC1000 and ICSU polishing pads into optimized polishing platforms that deliver comparable material removal rates and defectivity performance during subsequent CMP process operations.\\
Fig. 2
Surface roughness parameters and representative 3-D surface topography of IC1000 and ICSU polishing pads before and after the break in process
Although the surface topography of polishing pads governs slurry transport and abrasive retention, the local and effective mechanical properties ultimately dictate the contact pressure distribution, hydrodynamic slurry film thickness, asperity-level wafer–pad contact, and consequently, material removal uniformity and defect generation during the CMP process. The polishing pads used in this study are inherently porous composites, and their measured mechanical response depends strongly on the probed length scale and loading direction. At the nanoscale, the intrinsic stiffness and hardness of the solid polymer matrix dominate, whereas at larger scales relevant to wafer–pad contact, the macroscopic porous architecture significantly reduces the effective modulus and alters load-bearing behavior. To quantitatively elucidate these properties for both IC1000 and ICSU polishing pads, while bridging the critical scales that influence CMP performance, nano-indentation experiments were conducted following the widely validated Oliver–Pharr method bib21, bib22, bib23. A dual-scale approach, employing both low-load and high-load protocols, was specifically adopted to separately capture the intrinsic response of the solid polymer phase and the effective composite behavior of the full porous structure under realistic CMP loading conditions. In particular, the low-load protocol was used to isolate the intrinsic mechanical response of the solid polymer matrix from the influence of the porous architecture. Both IC1000 and ICSU polishing pads, which share identical concentric x-y groove patterns on their top surfaces as depicted in Figure 3(a), were examined after completion of the break in process. Following the break in, the pads were removed from the platen and sectioned into individual square cells, as illustrated in Figure 3(b). These isolated cells were then cryogenically frozen in liquid nitrogen using a snap-freezing technique and microtomed into 3 µm-thick slices with an HM525 NX Cryostat (Epredia, Portsmouth, USA). The resulting thin slices were carefully mounted onto glass slides for subsequent testing. Representative cross-sectional optical micrographs of the microtomed slices from the IC1000 and ICSU polishing pads are presented in Figures 3(c) and 3(d) and were acquired using a VMC250S optical microscope (3D Family Technology Co., Ltd., Shenzhen, China). Through this meticulous sample preparation procedure, the confounding influences of macroscopic porosity and any substrate effects were effectively eliminated, ensuring that the measured mechanical properties reflect exclusively the behavior of the solid polymeric phase. \\Nano-indentation experiments were performed using a Hysitron TI 980 TriboIndenter (Bruker-Hysitron, Minneapolis, USA). Figure 4 illustrates the instrument setup, with the high-load configuration employing a conical diamond tip shown on the left, and the low-load configuration using a Berkovich diamond tip shown on the right, along with the integrated high-resolution optical microscopy system. For each polishing pad type, twenty valid indents were acquired, and the resulting data were averaged to ensure robust statistical reliability in determining the hardness and elastic modulus of the solid polymer matrix.\\
Fig. 3
Schematic of the sample preparation procedure for low-load nano-indentation testing of IC1000 and ICSU polishing pads; a) Top-view of CMP pad with concentric x-y grooves; b) Sectioned square cells after break-in process; c) Cross-section of microtomed IC1000 slice; d) Cross-section of microtomed ICSU slice
Fig. 4
Nano-indentation experimental setup on the Hysitron TI 980 TriboIndenter instrument
The hardness material
and elastic modulus
of polishing pads were determined by nano-indentation method from the maximum applied load
and the projected contact area
using Eq. (1):\\
eq1
For low-load tests employing the Berkovich diamond indenter, the projected contact area was calculated as
, where
is the contact depth between probe tip and the solid material at maximum load. The reduced elastic modulus
was extracted from the initial unloading slope according to Eq. (2).
eq2
Where, the diamond indenter constants
GPa and
bib24, bib25, bib26 . The Poisson's ratio of the pad materials was taken as
(typical for cast polyurethane). Contact stiffness
as obtained by power-law fitting of the unloading segment at maximum penetration depth. To ensure penetration depths remained strictly below 1/10 of the slice thickness
during low-load nano-indentation tests, the maximum applied load was carefully set to
. Additionally, a controlled ramp loading sequence consisting of 5 second loading, 5 second holding at peak load, and 5 second unloading was employed. Under these conditions, the measured hardness and elastic modulus exclusively represent the intrinsic bulk properties of the solid polymeric matrix thermoplastic polyurethane for the IC1000 top layer and the Suba™ IV sub-pad material for the ICSU bilayer, respectively. \\For high-load tests using the conical diamond indenter (90° included angle, nominal spherical tip radius of 2 µm),
was determined from the instrument-calibrated area function. Calibration was carried out on a fused silica reference material by conducting indentations over a range of depths and fitting the resulting data to an empirical area function. This procedure accurately accounts for tip blunting and the spherical-to-conical transition that dominates at larger penetration depths, thereby ensuring reliable hardness and modulus values. To guarantee that indentations were performed exclusively on solid regions of the microtomed CMP pad specimens, in-situ scanning probe microscopy (SPM) imaging was utilized to precisely locate suitable plateau areas prior to indentation, thereby avoiding porous voids. The results of the low-load nano-indentation measurements are summarized in Figure 5. The solid matrix of the IC1000 top layer exhibited average values of hardness and reduced elastic modulus of 60.7 MPa and 994.1 MPa, respectively. In contrast, the Suba™ IV sub-pad material in the ICSU bilayer showed a substantially lower average hardness of 3.1 MPa, approximately 20 times softer than the IC1000 top layer, while its average reduced elastic modulus of 907.1 MPa remained comparable to that of the IC1000 layer within experimental error. These findings highlight the markedly different mechanical characteristics of the two materials. The thermoplastic polyurethane used in the IC1000 top layer is significantly stiffer and harder, providing excellent resistance to deformation and superior load-bearing capacity at the polishing interface. Conversely, the Suba™ IV sub-pad material is deliberately engineered to be much softer and more compliant, enabling greater elastic recovery and effective shock absorption. \\
Fig. 5
Analysis of hardness and elastic modulus of solid polymeric matrices in IC1000 polishing pad and Suba IV sub-pad by low-load nano-indentation protocol
High-load indentation was designed to evaluate the effective structural response of the polishing pads under loading conditions relevant to the CMP process. To replicate the compressive loading direction normal to the pad surface experienced during actual wafer polishing, indentations with loads ranging from 10 mN to 50 mN were performed directly on intact, unsliced pads using a conical diamond indenter. Consequently, this approach probes the full hierarchical porous structure in the exact orientation encountered in CMP, thereby yielding the effective stiffness and load-bearing characteristics that govern real wafer–pad contact mechanics. The high-load nano-indentation results, as shown in Figure 6, revealed a clear load-dependent behavior for both pads. At 10 mN, the IC1000 polishing pad exhibited an average hardness of approximately 45 MPa and the elastic modulus of approximately 750 MPa, while the ICSU polishing pad showed comparable values of approximately 42 MPa and 720 MPa, respectively. These values are close to the intrinsic matrix properties measured under low-load conditions, as the shallow penetration depth primarily engages the surface asperities and the top-layer material. However, as the load increased to 50 mN, the effective hardness and reduced elastic modulus decreased substantially in both pads due to deeper penetration and progressive collapse of the porous structure. Specifically, the IC1000 polishing pad yielded hardness of approximately 18 MPa and elastic modulus of approximately 310 MPa, whereas the ICSU polishing pad exhibited even lower values of approximately 9 MPa and 170 MPa, respectively. The more pronounced reduction in the ICSU polishing pad reflects the influence of its softer Suba™ IV sub-pad, which provides greater compliance and energy dissipation under high compressive loading. Overall, these results demonstrate that increasing the indentation load from 10 mN to 50 mN shifts the measured response from near-intrinsic matrix properties to the effective bulk properties dominated by the hierarchical porous architecture, thus highlighting the importance of high-load testing for capturing the mechanically relevant behavior in actual CMP conditions.\\
Fig. 6
Analysis of effective hardness and reduced elastic modulus of the bulk architecture in IC1000 and ICSU polishing pads by high-load nano-indentation protocol
Downforce effects on pad asperity contact behavior
Development of an in-situ polishing pad deformation measurement system
An in-situ measurement apparatus was developed in this study to evaluate downforce effects on polishing pad asperity contact behavior. The primary purpose of this custom apparatus is to replicate the compressive loading conditions encountered during the actual CMP process, thereby enabling direct comparison of asperity distribution and contact evolution between the monolithic IC1000 polishing pad and the bilayer ICSU polishing pad under identical loading conditions. This comparison highlights the role of pad architecture in determining contact uniformity and overall compliance, while providing insight into pad–wafer contact mechanics at the asperity level. The system enables microscopic quantification of the real contact area and the spatial distribution of contacting asperities between the pad surface topography and a rigid wafer surrogate under controlled compressive loading, as illustrated in Figure 7(a). This versatile setup accommodates various polishing pad types and facilitates real-time observation of multi-asperity deformation against a transparent rigid window, with simultaneous capture of contact area evolution and asperity distribution using an industrial digital CMOS camera (HY-5200, Shenzhen Hayear Electronics Co… Ltd., China). These parameters are essential for elucidating material removal mechanisms, defect formation, and planarization performance in CMP, particularly for advanced semiconductor nodes where asperity-scale interactions critically influence wafer surface quality and process uniformity. \\
Fig. 7
Schematic of the in-situ measurement apparatus for evaluating polishing pad asperity contact behavior and real contact area under controlled downforce
The in-situ measurement system incorporates a high-resolution digital camera and lens system, which provides non-contact imaging of the pad surface topography and enables real-time quantification of contacting asperities and real contact area evolution. A high-light-transmission rigid glass window (B270 Super white glass) serves as an optically transparent, ideally flat counter-surface, mimicking the rigidity of a wafer while allowing through-window observation of the pad–window interface. Figure7(b) shows the polishing pad surface imaged through the glass window under no-load conditions using the camera system. Polishing pad specimens are mounted on a precision z-direction movable stage driven by a high-accuracy linear actuator. The actuator advances the pad against the glass window at a controlled velocity as low as 1 µm/s, ensuring quasi-static loading conditions representative of CMP contact dynamics. Displacement is accurately monitored using a magnetic rotary encoder (MES-1024, FOTEK Co., Taiwan) with a resolution of 1024 pulses per revolution, which is converted to linear displacement for precise determination of asperity height deformation during compression. Applied load is measured with 0.01 N resolution by a compressive force transducer (MCDW-10L, Toyo Sokki Co., Ltd., Kanagawa, Japan) positioned beneath the movable stage, with real-time readout provided by a digital indicator (model TI-72, Toyo Sokki Co., Ltd.). Signals from both the force transducer and encoder are acquired synchronously via a data acquisition (DAQ) card. System integration, actuator control, signal processing, and synchronized storage of displacement, load, and microscopic images are achieved using custom software developed in LabVIEW 2020 (National Instruments, USA). Figure 7(c) presents a representative image captured by the designed in-situ measurement apparatus of contacting asperities on the glass window surface under a downforce of 2 PSI, where the dark regions correspond to the real contact area between the polishing pad and the wafer surrogate during the polishing process. This integrated design enables precise correlation between applied downforce, and asperity deformation, providing critical experimental data on pad compliance and contact mechanics under CMP-relevant loading conditions. \\
Evaluation of asperity contact features
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This subsection investigates the deformability and contact behavior of bulk-layer asperities in two commercial polishing pads, IC1000 and ICSU, under compressive loading. The quadrat method bib27, bib28, bib29, bib30 was used to quantify the spatial distribution of contacting asperities within the real contact area. Figure 8 schematically illustrates the overall procedure for analyzing the spatial distribution of polishing pad asperities, conducted using a designed in-situ measurement apparatus operated under a controlled compressive pressure of 1 PSI, with the analysis comprising sequential image acquisition, preprocessing, and quadrat-based spatial characterization. To ensure that the polishing pads exhibited properties representative of actual CMP operations, both IC1000 and ICSU were subjected to the break-in conditioning procedure described in Sect. 2. Following conditioning, the pads were sectioned into rectangular specimens measuring 4 cm × 4 cm using a laser cutter. Real contact area images were captured using a CCI camera at 20 × magnification, providing a field of view of 1.280 mm × 1.280 mm. In these images, the black regions correspond to the real contact area between asperities and the rigid glass window, as shown in Figure 8(a). The acquired images were processed using ImageJ software (National Institutes of Health, USA), through binarization, threshold optimization, and noise filtering, to isolate contacting asperities. Subsequently, each processed image was divided into a 10 × 10 quadrat grid for spatial distribution analysis, as illustrated in Figure 8(b). The spatial distribution results of summit asperity can be quantified by its skewness value , which is defined by Eq. (3). Where q is the total number of quadrats studied,
is the number of asperity in the
quadrat
,
is the average number of asperity per quadrat, and
is the standard deviation of the
distribution. \\
eq3
Subsequently, frequency histograms of asperity count per quadrat were generated to visualize the variability in local contact density. The mean equivalent summit asperity radius was estimated by fitting the measured radius distribution to a Gaussian function as shown in Figure 8c; this parameter provides a representative measure of asperity size, which is crucial for predicting local contact pressure and abrasive particle retention during CMP. The center of mass of each identified asperity was then determined, as shown in Figure 8(d), to establish precise positional coordinates for spatial analysis. A 10 by 10 quadrat grid was overlaid on the processed image, as illustrated in Figure 8(e), to systematically partition the contact region. Finally, the skewness value of the asperity count distribution was calculated, as presented in Figure8(f), to quantitatively assess the degree of clustering or uniformity. A skewness close to zero indicates a random, uniform distribution of contacting asperities, which is desirable for consistent material removal and low defectivity across the wafer. Positive skewness suggests clustering of asperities, potentially leading to localized high-pressure zones and an increased risk of scratches or non-uniform polishing, whereas negative skewness implies more regular spacing, which may enhance slurry flow and planarization efficiency. This skewness metric therefore serves as a key indicator of pad surface conditioning quality and its impact on CMP performance, enabling direct comparison between the monolithic IC1000 polishing pad and the bilayer ICSU polishing pad under identical downforce conditions.\\
Fig. 8
Image processing and quadrat analysis procedure used to quantify the spatial distribution of contacting asperities in polishing pads under applied downforce
To compare asperity contact features between the IC1000 and ICSU polishing pads, real contact data were collected from ten different imaging areas evenly distributed across the pad surface. Downforce was systematically varied by increasing the downward pressure from 1 PSI to 3 PSI using the designed in-situ apparatus, which closely replicates the loading conditions of the CMP process. The average equivalent summit asperity radius and the real contact area ratio, defined as the real contact area divided by the apparent contact area, changed markedly with increasing downforce, as illustrated in Figure 9. The comparison of spatial distribution, quantified by the skewness value of the quadrat count distribution, mean summit asperity radius, and real contact area ratio between the IC1000 and ICSU polishing pads was performed on pad surfaces conditioned by the break-in process described in Sect. 2. Images were sequentially acquired and analyzed following the processing steps outlined in Figure 8(a) and Figure 8(b) to evaluate the real contact area between the polishing pad and the rigid glass window surrogate. The real contact area ratio of both pads relative to the apparent contact area is summarized in Figure 9(a). The ratios for the two pads were highly similar, differing by no more than approximately 0.5 percent across the downforce range from 1 PSI to 3 PSI, with standard deviations not exceeding 1.5 percent for either pad under varying downforce. For both pads, the real contact area ratio increased significantly when downforce was raised from 1 PSI to 2 PSI (from approximately 0.53 percent to 0.78 percent), followed by a more modest increase to approximately 0.81 percent at 3 PSI. For both polishing pads, the real contact area ratio showed a nonlinear dependence on downforce, increasing substantially from approximately 0.53 percent to 0.78 percent between 1 PSI and 2 PSI, followed by a reduced incremental increase to approximately 0.81 percent at 3 PSI. The average equivalent summit asperity radius, as shown in Figure 9(b), exhibited a clear upward trend with increasing downforce for both polishing pads. The IC1000 polishing pad displayed a larger average radius compared to the ICSU pad at each pressure level. Specifically, the radius increased from approximately 3.5 µm at 1 PSI to around 6.5 µm at 3 PSI for the IC1000 polishing pad, while the ICSU polishing pad showed a similar but slightly lower trend, rising from about 3.0 µm to 5.5 µm over the same range. The ICSU polishing pad, incorporating the softer Suba™ IV sub-layer, exhibited a smaller average equivalent summit asperity radius compared to the IC1000 polishing pad at the same downforce level. This indicates that the compliant bilayer structure of the ICSU polishing pad resists asperity spreading more effectively, allowing greater deformation and flattening of contacting asperities under compressive loading. In contrast, the stiffer monolithic IC1000 polishing pad limits asperity spreading, resulting in a larger average radius.\\
Fig. 9
Analysis of downforce-dependent real contact area ratio and average equivalent summit asperity radius for IC1000 and ICSU polishing pads
The skewness of the asperity spatial distribution, obtained from the quadrat analysis and shown in Figure 10, varied systematically with increasing downforce for both polishing pads. For the IC1000 polishing pad, the skewness was approximately 0.8 at 1 PSI, indicating a near-random spatial distribution of contacting asperities, and increased modestly to about 1.2 at 3 PSI, reflecting the development of mild asperity clustering with increasing load. In contrast, the ICSU polishing pad exhibited a lower initial skewness of approximately 0.6 at 1 PSI, consistent with a more uniform asperity distribution associated with its compliant bilayer structure, and increased gradually to around 0.9 at 3 PSI, remaining indicative of a predominantly random distribution. These results demonstrate that the monolithic IC1000 polishing pad exhibits a greater tendency toward asperity clustering, as reflected by higher positive skewness values, which can be attributed to its relatively stiff structure that limits uniform deformation and promotes localized contact. By comparison, the bilayer ICSU polishing pad, incorporating a compliant Suba™ IV sublayer, maintains skewness values closer to unity across the examined downforce range, indicating a more uniform and random spatial distribution of contacting asperities. This enhanced uniformity enables more even load sharing across the pad surface, which is favorable for improved within-wafer uniformity and a reduced likelihood of localized polishing defects during CMP. Overall, the observed skewness trends highlight the critical role of pad architecture in governing asperity-scale contact mechanics, with the bilayer ICSU polishing pad design providing greater compliance and more homogeneous contact behavior under increasing downforce than the IC1000 polishing pad.\\
Fig. 10
Comparison of skewness values and spatial distribution of contacting asperities between IC1000 and ICSU polishing pads using quadrat method
Polishing pad layer structure effects on copper patterned wafer
Chemical mechanical polishing experimental setup
This section describes CMP experiments conducted on copper patterned wafers using IC1000 and ICSU polishing pads to systematically compare polishing performance and to evaluate the influence of pad layer architecture on key CMP metrics, including surface roughness, and dishing behavior of through-silicon via copper structure. The results provide insight into the relative suitability of these polishing pads for advanced semiconductor manufacturing processes. The CMP experiments were performed using a PM5 polishing machine (Logitech Ltd., UK), a commercial benchtop system designed to provide precise control of key process parameters for semiconductor polishing applications, as illustrated in Figure 11(a). The system is equipped with a wafer-holder polishing head and a rotating platen for mounting the polishing pad, enabling uniform pressure application and stable rotational speeds suitable for small-scale wafer processing. The experiments utilized 2-inch patterned wafers consisting of copper film deposited on silicon substrates with a thermally grown
layer, featuring thin copper film structures with a step height of 1 µm to simulate advanced interconnect geometries. Top-view image of the copper patterned wafer was captured using an optical microscope (VHX-1000, KEYENCE, Japan), and the corresponding cross-sectional structures are schematically illustrated in Figure 11(b).\\
Fig. 11
CMP experiment. (a. CMP experimental setup; (b. Top-view optical micrograph of the copper-patterned wafer with schematic representation of the cross-sectional structure
A
The polishing slurry employed in this study was a fumed silica–based formulation supplied by Evonik Industries, Germany, with an average particle size of 50 nm and a neutral pH of 7, which was adjusted using potassium hydroxide and nitric acid (
). Prior to polishing, the slurry was diluted at a 10:1 ratio of DI water to concentrated slurry. Size distribution of slurry abrasives analyzed and validated using the ZetaPLUS zeta potential measurement system (Brookhaven Instruments). In addition, hydrogen peroxide (
) was incorporated as the primary oxidizing agent in order to promote the formation of a compliant copper oxide layer on the wafer surface, thereby facilitating enhanced mechanical material removal. During polishing, the slurry flow rate was maintained at 200 mL/min to ensure sufficient lubrication and uniform abrasive delivery across the polishing pad and wafer interface. Before each polishing run, the polishing pads were mounted on the platen and subjected to the break-in conditioning process described in Sect. 2. Subsequently, the applied downforce was varied from 1 PSI to 3 PSI, while the wafer head rotation speed and platen rotation speed were fixed at 70 RPM and 80 RPM, respectively. For consistency, each polishing experiment was conducted for a duration of 1 min to achieve measurable material removal. Collectively, these operating parameters were selected to closely replicate industrial CMP conditions for copper patterned wafers, thereby enabling a systematic evaluation of the influence of pad layer architecture on material removal rate, surface uniformity, and defect formation. Finally, all experiments were repeated three times under each condition to ensure statistical reliability. A summary of the experimental parameters is provided in Table 2.\\
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begin{table}[h!] \centering\caption{Process parameters for setting up CMP experiments}\label{tab2} \begin{tabular}{ c c } \\ \hline \begin{minipage}{0.3\textwidth} \includegraphics[width=\linewidth, height=30mm]{Fig_Table2.jpg} \end{minipage} \begin{tabular}{c c}Description & Parameters \\\midrulePolishing pad & IC 1000 / ICSU x-y groove \\Polisher & Logitech PM5 Machine\\Head/platen rotation speed & 70/80 Rpm\\Polishing time & 60 second \\Flow rate & 200 mL/min \\Applied downward pressure & 1/ 2/ 3 PSI \\Wafer & 2-inch patterned wafer \\Abrasive particle & Fumed silica (50nm )\\ \end{tabular}\\ \hline \end{tabular} \end{table}Influence of pad layer structure on CMP performance
To systematically evaluate the influence of the polishing pads' effective structural response on CMP performance for through-silicon via copper structures on patterned wafers, both surface roughness and dishing within the copper vias were characterized using atomic force microscopy (AFM) with a Multimode 8 system (Bruker Corporation, Billerica, MA, USA), equipped with a standard silicon probe tip (Scanasyst-Air, Bruker Probes; nominal tip radius of 2 nm). Representative AFM images, along with the specific locations for dishing depth and surface roughness measurements, are shown in Figure 12. Subsequently, surface roughness and cross-sectional profiles were analyzed using NanoScope Analysis software. The dishing depth was evaluated along the straight line indicated by the green line in Figure 12(a) and was defined as the vertical distance between the lowest point at the bottom of the copper via and the surrounding surface plane. In parallel, surface roughness was analyzed within the through-silicon via copper region marked by the blue area in Figure 12(b), where the average surface roughness
was quantified over the via surface. For statistical reliability, surface roughness measurements were performed at nine evenly distributed locations across the 2-inch patterned wafer. The average values obtained from these measurements were ultimately used to characterize CMP performance for each pad type under the corresponding polishing conditions. \\
Fig. 12
Representative AFM images and quantitative analysis of dishing depth and surface roughness in copper via structures after CMP process
The surface roughness results summarized in Figure 13 indicate that the ICSU pad consistently produced lower average Ra values for through-silicon via copper structures across all applied downforce levels compared to the IC1000 polishing pad. Specifically, wafers polished with the ICSU pad exhibited Ra values ranging from 1.6 ± 0.1 nm at 1 PSI to 2.15 ± 0.22 nm at 3 PSI, whereas those polished with the IC1000 polishing pad showed higher roughness, increasing from 1.8 ± 0.15 nm to 2.5 ± 0.22 nm over the same downforce range. The improved surface smoothness observed within the copper-filled through-silicon vias using the ICSU polishing pad is primarily attributed to contact-mechanical effects induced by the compliant Suba™ IV sub-layer. Under compressive loading, this compliant backing layer promotes pronounced asperity flattening and lateral spreading, resulting in a reduced average equivalent summit asperity radius, as quantified in Sect. 5. From a contact mechanics perspective, the increased real contact area and reduced asperity curvature effectively redistribute the applied normal load over a larger number of contact junctions, thereby lowering local contact stresses at the three-body interaction interface (pad asperity–abrasive particle–copper surface). As a consequence, abrasive particles experience more uniform load sharing and diminished stress intensification, leading to shallower abrasive penetration depths and a transition toward less aggressive three-body abrasion. This mitigates micro-plowing and micro-scratching mechanisms at the copper surface while promoting more uniform material removal. Collectively, these contact-mechanical effects suppress localized damage and yield smoother post-CMP copper via surfaces. By contrast, the IC1000 polishing pad, which possesses a stiffer and more monolithic structure characterized by a larger equivalent asperity radius and higher effective stiffness, promotes increased abrasive confinement at asperity summits. This behavior results in elevated localized contact pressures on protruding surface features, thereby enhancing abrasive indentation into the copper vias and ultimately giving rise to increased surface roughness.\\
Fig. 13
Evaluation of surface roughness of through-silicon via copper structures after CMP using IC1000 and ICSU pads under varying downforce conditions.
Dishing measurements on through-silicon via copper structure, as presented in Figure 14, revealed distinct trends with increasing downforce. For the copper patented wafers were polished with IC1000 polishing pad, dishing increased steadily from approximately 15.3 nm at 1 PSI to 20.45 nm at 2 PSI, followed by a modest rise to 23.3 nm at 3 PSI, reflecting its higher effective stiffness that resists excessive over-polishing in recessed features even under elevated pressure. In contrast, for copper patented wafers were polished with ICSU polishing pad, dishing remained lower than that of that at 1–2 PSI (approximately 13.25 nm at 1 PSI and 18.23 nm at 2 PSI), but exhibited a nearly linear increase, surpassing the IC1000 value at 3 PSI (approximately 25.6 nm). This behavior arises from the greater compliance of the bilayer ICSU pad, which initially minimizes dishing at low downforce through better load distribution, but allows increased deformation and over-removal in vias as pressure rises, due to the softer Suba™ IV sub-layer. These contrasting outcomes are directly linked to the mechanical properties characterized in Sect. 5. The higher intrinsic hardness and modulus of the IC1000 top layer, combined with its monolithic architecture, maintain greater effective stiffness under high loading, limiting via over-polishing and dishing. Conversely, the softer Suba™ IV sub-layer in the ICSU pad reduces overall pad stiffness, facilitating enhanced asperity compliance and smoother surfaces but at the cost of increased sensitivity to downforce, leading to higher dishing at elevated pressures. Additionally, the larger equivalent asperity radius in the IC1000 pad under loading further contributes to more concentrated abrasive contact, promoting material removal but increasing roughness, while the smaller radius in the ICSU polishing pad supports broader, more uniform abrasive distribution for reduced roughness and improved global uniformity.\\
Fig. 14
Evaluation of dishing depth in through-silicon via copper structures after CMP using IC1000 and ICSU polishing pads under varying downforce conditions.
Conclusion
In summary, this study elucidates the critical role of polishing pad layer structure in CMP performance for copper patterned wafers through a systematic comparison of the monolithic IC1000 polishing pad and the bilayer ICSU polishing pad. The key findings are as follows:
1.
The development of a novel in-situ downforce simulation apparatus and the application of the quadrat method for asperity spatial analysis represent key methodological advancements. These tools enabled, for the first time, real-time visualization and quantitative assessment of asperity contact features, revealing that the ICSU polishing pad achieves a slightly higher real contact area ratio and more uniform asperity distribution, attributable to its compliant sub-layer.
2.
CMP results on through-silicon via copper structures in patterned wafers indicated that the ICSU polishing pad provides superior post-CMP surface roughness and enhanced within-wafer non-uniformity reduction, whereas the IC1000 polishing pad offers better control of dishing in recessed features due to its higher rigidity. Across the tested downforce range, the IC1000 polishing pad demonstrates more effective dishing control, making it particularly suitable for applications requiring minimal feature recession, such as high-density interconnects. In contrast, the ICSU polishing pad, while delivering improved surface smoothness and potentially lower defectivity at moderate pressures, exhibits increased sensitivity to higher downforce, resulting in greater dishing. These observations underscore the inherent trade-offs in pad architecture: the stiffer monolithic design favors dishing control and local planarization, whereas the compliant bilayer structure promotes global uniformity and surface finish at the expense of increased feature recession under elevated loading.
The insights gained from this research provide valuable guidance for optimizing CMP processes in advanced copper interconnect fabrication. Future studies may focus on developing hybrid pad architectures or optimizing conditioning strategies to achieve an improved balance between surface quality, planarization uniformity, and dishing control in next-generation semiconductor manufacturing.\\
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DeclarationsFunding No funding was received to assist with the preparation of this manuscript.
Conflict of interest The authors declare that we have no conflicts of interest.
Author contribution Pham have designed the study, preparation of the original draft. Huy has carried out the experiments. All authors have discussed the results and commented on the final manuscript.
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Acknowledgements
The authors would like to acknowledge the support of time and facilities from Tra Vinh University (TVU) for this study
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