THESIS CLAIM MAP: FINAL ERL ARCHITECTURE, OBJECTIVES AND FIGURES
23 October 2026 — full supplied-source review

SCOPE AND INTERPRETATION

This map uses the newly supplied Module/ implementation and the current v35 integration path. It supersedes earlier statements that the controller, barrier or surrogate internals were unavailable. It reuses the previously reviewed objective/hypothesis locators in analysis/prior_thesis_audit/hypotheses_objectives.csv (preserved prior audit); it does not perform a new thesis-PDF audit or reanalyse historical raw runs. The source was not bound to the executables used in those runs. Focused host tests establish particular implementation behavior, not complete build, hardware correctness or performance.

“Final ERL” here means the author's implemented evolutionary/Pareto search coupled to online workload-conditioned surrogate learning, adaptive weights and resource control. Independent policy/value-network RL was part of historical qualification discussion, not an unmet requirement of this final architecture. The source's seedRLReplayBuffer routine only counts/logs rank-0 candidates (GeneticAlgorithm_05.h:1808–1818); describe that routine accurately without making a separate RL agent a condition for accepting the final contribution.

Source aliases below: H=SampleTestIntegrationCode_v35.cpp; CM=Module/ConfigManager.h; M=Module/Modules.h; ES=Module/EvolutionarySelector_02.h; GA=Module/GeneticAlgorithm_05.h; SM=Module/SurrogateModel.h; SC=Module/Scheduler.h; AWM=Module/AdaptiveWeightManager.h; AG=Stage_01/Concretes/SystemMetricsAggregatorConcrete_v3_2.h. All locations refer to full_code_review/source/.

DEFENSIBLE ARCHITECTURE PARAGRAPH FOR THE THESIS

The implemented ERL framework integrates experiment orchestration, heterogeneous image processing, online evolutionary decision making and measurement on the evaluated Jetson platform. A persistent ConfigManager owns the module wrappers, frame queues, metrics aggregator and shared RuntimeControls. Camera acquisition supplies frames to an algorithm worker and an original-image display path; the worker dispatches CPU, CUDA or partitioned Gaussian processing, while SoC and Lynsyn monitors supply telemetry. The EvolutionarySelector admits fresh workload-consistent snapshots and invokes a persistent GeneticAlgorithm. The search combines feasibility-aware Pareto ranking and crowding with scalar deployment selection, using workload-conditioned EMA/k-nearest-neighbor surrogate predictions and adaptively weighted objectives. A downstream Scheduler transforms selected requests into software controls and checked platform writes, subject to parts of the thermal policy, and publishes partial readback. During a mission boundary, the algorithm implementation is replaced while the controller objects remain alive; workload-specific surrogate banks are retained, current genes are canonicalized for the incoming workload, and the previous action's GA learning credit is cleared. Epoch and frame checks expose transition provenance. This architecture establishes integrated, stateful adaptation and inspectable control decisions; it does not by itself establish optimality, causal learning benefit, equivalent application output, or guaranteed thermal and lifecycle correctness.

Core support: CM:227–371,480–554,821–838; M:517–657; ES:378–472,739–907,600–617; GA:446–501,1085–1250,1968–2134,2311–2387; SC:508–603,749–785.

OBJECTIVE-TO-CLAIM MAP

O1 — Integrated final ERL framework for resource-management optimization
Original objective locator: thesis PDF32 / printed14, as recorded in the prior objective audit.
Source-confirmed mechanism: one persistent GA/selector/Scheduler, online surrogate updates, adaptive objective weights, resource publication and an algorithm-only transition seam. GA objectives, feasibility-aware ranking/crowding, tournament selection, crossover/mutation and scalar deployment selection are implemented (GA:1257–1322,1412–1435,1968–2134,2311–2387). This supports implementation of the final integrated ERL design. It is NSGA-II-inspired ranking/crowding with elitist reproduction, not full parent-plus-offspring NSGA-II environmental selection or an external historical Pareto archive.
Claim boundary: implementation is established; superior or near-optimal resource management is an empirical proposition. A feasible rank-0 selected candidate is best under the available predictions/selection rule, not proven best on hardware or globally. The legacy obj_energy field is normalized watts (GA:1294–1303), not energy per useful output. Establish benefit with predeclared objectives, matched workloads, independent repetitions and feasible comparators. Isolate evolutionary search, learned prediction and AWM effects where those individual benefits are claimed. Do not report a missing independent RL learner as the unresolved part of O1.

O2 — Benchmark for performance, efficiency and energy evaluation
Original locator: PDF32 / printed14.
Source-confirmed mechanism: v35 configures modes, thermal profiles, recurring workload schedules, traces, transition evidence, candidate/action exports and optional collector events (H:1381–2003; WorkloadMission.h:109–198). Processing time, observed FPS and software display-completion timing are distinct quantities. Per-frame energy is mean measured-rail power multiplied by an algorithm-processing interval, using zero-order-hold window integration (AG:1216–1244,1802–1891). Direct Lynsyn CSV trapezoids are a separate product.
Claim boundary: the benchmark exists, but measurement semantics and coverage constrain its conclusions. It does not directly measure optical latency, isolated GPU energy or whole-mission energy per equivalent delivered output. The learning latency target is E2E (ES:1125–1126; GA:1095–1097); processing-latency prediction accuracy cannot be inferred from it. Required evidence includes electrical rail topology/calibration, clock alignment, fresh sensor coverage, independent useful-output counts, equivalent CPU/GPU outputs and explicit missing-data treatment. Current source contains Sobel/Histogram semantic differences and a partitioned-Gaussian halo defect; comparison of unequal work must be qualified before claiming policy efficiency. Existing October numerical findings remain findings of the separate recording audit, not newly reproduced here.

O3 — Methodological/metaheuristic contribution to allocation, communication and integration
Original locator: PDF32–33 / printed14–15.
Source-confirmed mechanism: model-guided candidate evaluation combines exact configuration buckets, inverse-distance neighbors and physics-prior fallback (SM:145–178,203–346,499–590). The GA/AWM/governor/controller interfaces form an inspectable adaptive system. Novelty can be claimed for a precisely differentiated integration, experimental contract or evidence method when supported by related work; standard GA, Pareto and k-NN ingredients are not individually new because integrated.
Claim boundary: configuration keys omit thermal/load/history features and represent coarse requested controls. They do not establish a generally context-aware learned plant model. Current support counts are shared across targets, and actual-header tests show unmeasured targets can remain priors while being reported as sufficiently supported. Requested and executed controls diverge; recovery and mixed/stale power can contaminate labels. Predictive usefulness requires frozen pre-outcome predictions, per-target provenance, held-out evaluation and suitable forecast baselines. Policy improvement requires interventions, not prediction accuracy alone. Communication efficiency needs measured copy/transfer/queue cost and matched output, while full controller overhead requires the complete decision/actuation/recording path, not GA computation alone. A surrogate ON/OFF test currently changes several other behaviors (GA:1085,1125–1187,1294–1313,2165–2168), so it is not an isolated memory ablation.

O4 — Hardware/software integration and device agnosticism
Original locator: PDF33 / printed15.
Source-confirmed mechanism: interfaces, wrappers and RuntimeControls separate some orchestration and platform responsibilities. Scheduler checks platform writes and compares CPU0 maximum with an expected policy maximum (SC:103–125,198–216,700–785). Camera, display, SoC polling and Lynsyn are integrated with CPU/CUDA execution. This is substantive Jetson hardware/software integration.
Claim boundary: platform-specific sysfs paths, Linux APIs, CUDA/SDL dependencies and NVIDIA commands remain. CPU-max readback verifies a narrow software-visible condition; it does not prove physical frequency residency, every control's execution or simultaneous application. GPU permission is not kernel execution proof. Device-agnostic operation/performance needs a second implementation or platform study with documented adapter changes, equivalent outputs and common measurement boundaries. Modular interfaces alone do not complete that part of O4.

O5 — Verification and validation of reliable/effective operation
Original locator: PDF33 / printed15.
Source-confirmed mechanism: workload barriers, monotonically fresh frame admission, workload epochs, transition checks, readback, event records and focused behavior tests create useful verification points (ES:378–472,747–815; H:1799–1842; SC:749–785). A compiled surrogate test confirms isolated A→B→A banks and restored observations. Defect discovery and explicit restrictions on claims are valid V&V contributions.
Claim boundary: frame/workload freshness does not prove that measurements belong to the preceding applied action. Collector outcomes explicitly use an assigned interval and unknown settings-change status (ES:832–834). Collector fail-open status, cross-boundary ticket attribution, I/O sealing and lifetime races prevent equating a sealed file/process exit with validated evidence. Shutdown also contains retained-USB-owner and blocked-output/reconnect join hazards. Thermal enforcement is partial: declared inference/skip policies are not consumed, shutdown override is one-shot and recovery can bypass GPU permission. Report pass/fail/unverified invariants with fault models, rather than exhaustive reliability or absence of unforeseen effects. A complete reproducible build remains unestablished: build recipe/config/dependencies are absent, and isolated probes expose additional build/link issues.

O6 — Scalability through processor modeling/simulation and future configurations
Original locator: PDF33 / printed15.
Source-confirmed mechanism: bounded queues, a small configurable population, generic module interfaces and coarse model banks provide implementation parameters that could be studied. They are not a scalability result.
Claim boundary: no validated scaling simulator or scaling experiment is established by this source review. More frames, longer missions or repeated trials are endurance/replication evidence, not scaling evidence. Define the dimension—cores, accelerators, concurrent workloads, arrival load, model-bank count or devices—and validate a model against hardware before estimating throughput, overhead, memory or optimization behavior as that dimension grows. Keep O6 untested/deferred unless that study is supplied.

RESEARCH PROBLEM AND HYPOTHESES: CLAIM-ADMISSION RULES

The original resource-management problem and general objective include optimization, not merely building a controller. The final architecture now has direct source support for integration, stateful adaptation and workload-model retention. Whether it improves jointly defined performance and energy efficiency remains separate. Preserve the approved hypothesis wording and grade its clauses; do not replace a broad optimization proposition with the narrower finding that state was retained.

H1 needs a specified workload population, meaningful joint performance/energy effect, comparator and independent runs; source cannot establish statistical improvement. H2's integration clause is supported at implementation level, while efficiency caused by integration requires comparison. H3 concerns systematic literature-review method and verified gap claims; neither source code nor recordings validate the search/screening protocol. H4 requires equivalent useful image/application outputs and condition-specific benefits, including unfavorable cases. H5's absolute absence-of-unforeseen-effects guarantee is not demonstrated; detected defects support bounded V&V practice instead.

For a causal memory claim, compare retained memory with a memory-only reset and sham under matched recurrence/input/thermal conditions, preserving and verifying controller state as intended. Use independently randomized/counterbalanced blocks and prespecified prediction, recovery-time or regret measures. Test AWM/search separately if separate benefits are claimed. First repair outcome attribution and admission issues, then bind source, binary, configuration, input and outputs for every admitted run. The focused source tests here establish retention mechanics; they do not establish positive transfer or faster recovery.

CAPTIONS FOR THE TEN CURRENT FIGURES

01 — PhD problem, implemented framework and evidence scope.
Research aims connect an integrated adaptive execution/control system with experimental comparison and bounded thesis claims. The supplied source supports the final evolutionary/surrogate architecture; campaign counts and observed trade-offs shown in the figure belong to the separately audited October evidence. This source review neither regenerates those statistics nor proves that the supplied snapshot produced those recordings. Historical qualification proposals are distinct from the final implementation.

02 — Responsibilities in the implemented software architecture.
The v35 harness creates the mission and optional collector and invokes ConfigManager, which owns pipeline modules and shared resources. A persistent selector/GA, surrogate, AWM and Scheduler consume aggregated observations and publish controls for the algorithm worker. Sensor and frame paths feed exports. This is a responsibility/dependency view, not a complete call graph or ownership diagram; the harness, rather than ConfigManager, owns WorkloadMission and the local collector.

03 — Frame acquisition, ownership and processing.
USB YUYV retains an MMAP-backed frame through an owner guard; CSI RG10 converts into independently owned YUYV storage and promptly returns the capture buffer. Shared handles feed CPU/CUDA/hybrid execution and independent latest-frame display paths. CUDA transfers, result copies, color conversion and texture upload remain, so copy avoidance is boundary-specific. Frame ownership and numerical CPU/GPU equivalence require validation independently of timing.

04 — Continuous dynamic-mission orchestration.
The launcher validates profiles, builds one pipeline, holds evolution before starting workers, completes warmup and begins the measured schedule. Due boundaries invoke algorithm replacement, epoch/generation checks and a replacement-frame proof before advancing the phase. GA resumes before the caller completes its proof poll. The five-second proof deadline does not bound a blocked join inside the swap; collector and shutdown handling retain the documented lifecycle limitations.

05 — Learning, preference weighting and effective-action boundaries.
Workload-conditioned surrogate predictions and AWM weights guide evolutionary deployment selection; downstream thermal and mode policies transform requests into controls and platform writes. Future measurements feed learning. Requested, permitted, written and executed actions are distinct evidence states. AWM changes soft scalar preferences; it is not the thermal permission mechanism. The drawing describes the implemented feedback structure without asserting causal action/outcome alignment or complete enforcement of declared safety policies.

06 — Evaluated deployment topology and external instrumentation.
A Linux/Jetson process connects camera acquisition, ARM CPU and CUDA execution, SDL presentation, platform telemetry and a USB Lynsyn monitor. Process memory and files carry frame state and evidence. Rail wiring, calibration, effective configuration and deployed build identity must be documented outside the code. This single-platform topology supplies no empirical device-agnostic or cross-platform performance result.

07 — Selected concurrent workers and lifecycle obligations.
Capture, algorithm, display and monitoring workers exchange frames and samples with the aggregator. The full implementation also includes selector/control and optional collector/background threads. USB guards must expire before their DataConcrete owner is destroyed, and blocked queues/reconnect paths must be interruptible before joins. The highlighted contracts are required conditions identified by review, not conditions that current shutdown universally satisfies.

08 — Evidence admission before a thesis claim.
Experiment definitions and observations become defensible comparisons only after provenance, integrity, measurement semantics and fair-work checks. Integration and retained state have direct implementation support; numerical trade-offs require admitted recordings, while causal memory gains, general superiority, energy per useful output and portability require additional experiments. A valid checksum or seal is narrower than scientific validity and cannot replace these stages.

09 — One admitted evolutionary period.
After snapshot admission, optional pilot hooks close the preceding ticket and open the next context. AWM/model updates precede candidate prediction, feasibility-aware Pareto ranking and scalar deployment selection. Scheduler applies the selected request; reproduction and generation advancement follow, and pilot prediction/action records are emitted after evolve returns using recorded instants. This order does not guarantee a settled previous-action observation: requested-state attribution, recovery overrides and cross-boundary pilot credit remain limitations.

10 — Algorithm-only workload replacement and retained state.
A pause flag and GA mutex barrier wait for any in-flight generation. The replacement is constructed/configured before old-worker stop; after join, processing queues drain, provenance is cleared/advanced and the replacement starts. GA workload context commits in place, reuses the model bank and clears GA action credit before evolution resumes under frame gates. The caller then records/checks transition evidence and advances the mission. Retention is supported; unchanged bytes, cross-workload transfer and improved recovery are stronger claims requiring additional evidence.

FIGURE QA

The final diagram package incorporates the full-source review corrections: replacement preparation precedes stop/join; GA credit and collector ticket state are distinguished; evidence-row writing precedes transition validation; state boxes annotate retention rather than implying sequential operations. The main report and detailed lifecycle review preserve further ordering qualifications.
