4-Bit Ripple Carry Adder (RCA) Simulation Report
==================================================
Input A (5): [1, 0, 1, 0]
Input B (3): [1, 1, 0, 0]
Sum Output Bits (LSB to MSB): [0, 0, 0, 1]
Final Carry Out: 0
Arithmetic Result: A(5) + B(3) = Sum(bits) + Cout<<4 -> 8 + 0 = 8 (expected 8)
Raw sum-node currents: [1.89, 1.89, 1.89, 14.27], Cout current: 1.795
Signal Integrity Check: Pass (all outputs > T_MH=9.64 or < T_LM=3.45; min HIGH margin = 4.63 above T_MH, min LOW margin = 1.56 below T_LM)

NEXT STEP - Exhaustive Verification (all 16x16x2 = 512 cases):
Passed: 512 / 512
Failed: 0
Worst-case noise margins across all 512 cases: HIGH min = 3.92, LOW min = 1.56
Carry chain attenuated current at next-stage C_in: I_H*FANOUT_DROP = 13.56 (still > T_MH = 9.64)
XOR intermediate s1 low-level current: I_L*FANOUT_DROP = 1.7955 (still < T_LM = 3.45) - logic-safe.
