QDI 6-Gate Architecture Validation Report
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Thresholds: T_LM=3.45mA, T_MH=9.64mA
Base currents: I_L=1.89mA, I_M=5.01mA, I_H=14.27mA

--- NOT Gate ---
Inputs (0,) -> I=14.27mA -> HIGH (bit=1) | expected=1 | PASS
Inputs (1,) -> I=1.89mA -> LOW (bit=0) | expected=0 | PASS

--- AND Gate ---
Inputs (0, 0) -> I=1.89mA -> LOW (bit=0) | expected=0 | PASS
Inputs (0, 1) -> I=1.89mA -> LOW (bit=0) | expected=0 | PASS
Inputs (1, 0) -> I=1.89mA -> LOW (bit=0) | expected=0 | PASS
Inputs (1, 1) -> I=14.27mA -> HIGH (bit=1) | expected=1 | PASS

--- OR Gate ---
Inputs (0, 0) -> I=1.89mA -> LOW (bit=0) | expected=0 | PASS
Inputs (0, 1) -> I=14.27mA -> HIGH (bit=1) | expected=1 | PASS
Inputs (1, 0) -> I=14.27mA -> HIGH (bit=1) | expected=1 | PASS
Inputs (1, 1) -> I=14.27mA -> HIGH (bit=1) | expected=1 | PASS

--- NAND Gate ---
Inputs (0, 0) -> I=14.27mA -> HIGH (bit=1) | expected=1 | PASS
Inputs (0, 1) -> I=14.27mA -> HIGH (bit=1) | expected=1 | PASS
Inputs (1, 0) -> I=14.27mA -> HIGH (bit=1) | expected=1 | PASS
Inputs (1, 1) -> I=1.89mA -> LOW (bit=0) | expected=0 | PASS

--- NOR Gate ---
Inputs (0, 0) -> I=14.27mA -> HIGH (bit=1) | expected=1 | PASS
Inputs (0, 1) -> I=1.89mA -> LOW (bit=0) | expected=0 | PASS
Inputs (1, 0) -> I=1.89mA -> LOW (bit=0) | expected=0 | PASS
Inputs (1, 1) -> I=1.89mA -> LOW (bit=0) | expected=0 | PASS

--- XOR Gate ---
Inputs (0, 0) -> I=1.89mA -> LOW (bit=0) | expected=0 | PASS
Inputs (0, 1) -> I=14.27mA -> HIGH (bit=1) | expected=1 | PASS
Inputs (1, 0) -> I=14.27mA -> HIGH (bit=1) | expected=1 | PASS
Inputs (1, 1) -> I=1.89mA -> LOW (bit=0) | expected=0 | PASS

OVERALL: ALL GATES PASS
